Makefile Tutorial
Posted: Fri May 11, 2012 10:51 am
One of the most hardest things for people who are relatively new to C/C++ and have just adapted to the language its self, but haven't really worked with the command-line much, is adapting to the world of Makefiles.
If you have a relatively large project which doesn't have a definite number of components to it, for example a game-engine will tend to gain more and more classes over time as the engine expands.
Instead of explicitly stating all the source files to compiled from a batch/bash script, it is far more efficient to use a Makefile. A Makefile checks if you the objects you are compiling for already exist, AKA. it only recompiles a source file if the code has been modified. So if I had three source files and I compiled them all. Later I added some more code to one of them, then when compiling Make will check if the object for that source already exists and if it contains the same code of which would be generated from the source, if it is different(in our case it will be for one of them), then it will just re-compile that one.
I have wrote a nice little Makefile template for you to use:
When using this template you should specify the name of the executable you wish to be outputted in 'EXEC'; the compiler you want to use in 'CC'; the source file extension in 'SRC_EXT'; your compiler flags(will cover more later); your linker flags(" "); the location in which your source code is store(leave blank if in local directory); the location where you wish for the binaries to be outputted to.
To use a Makefile you will have to install some variant of Make --I recommend GNU-Make(the original). GNU-Make can get accumulated from here: http://gnuwin32.sourceforge.net/packages/make.htm.
To invoke a Makefile you must navigate from the command-line(could create a shell script to automate this process), to the directory in which you want to invoke the Makefile of, and simply type 'make' and hit enter. If you have Make installed correctly, then this should run just fine provided you haven't messed up the Makefile. Makefiles tend to be named 'Makefile', but if you have multiple Makefiles then you can invoke a specific one by 'make -f MAKEFILE_NAME_HERE'. Quite obviously you replace the 'MAKEFILE_NAME_HERE' with the name of the Makefile you wish to invoke. I'd recommend if you have multiple platforms to compile for that you have multiple Makefiles, one for each OS/platform, e.g. a 'WIN' Makefile, a 'DC' one etc.
In future tutorials I shall cover compiling from the command-line for C/C++ using GCC/G++, and how to link from the command-line in your Makefile etc. Anyway for now, I hope this helped.
-OmenFelix
If you have a relatively large project which doesn't have a definite number of components to it, for example a game-engine will tend to gain more and more classes over time as the engine expands.
Instead of explicitly stating all the source files to compiled from a batch/bash script, it is far more efficient to use a Makefile. A Makefile checks if you the objects you are compiling for already exist, AKA. it only recompiles a source file if the code has been modified. So if I had three source files and I compiled them all. Later I added some more code to one of them, then when compiling Make will check if the object for that source already exists and if it contains the same code of which would be generated from the source, if it is different(in our case it will be for one of them), then it will just re-compile that one.
I have wrote a nice little Makefile template for you to use:
Code: Select all
EXEC=exec
CC=gcc
SRC_EXT=c
CFLAGS=
LFLAGS=
SRC=src/
BIN=bin/
all: $(BIN)$(EXEC) install
$(BIN)$(EXEC): *.o
$(CC) -o $(BIN)$(EXEC) *.o $(LFLAGS)
*.o:
$(CC) -c $(SRC)*.$(SRC_EXT) $(CFLAGS)
install:
cp $(BIN)$(EXEC) /usr/bin
clean:
rm -f *.o
To use a Makefile you will have to install some variant of Make --I recommend GNU-Make(the original). GNU-Make can get accumulated from here: http://gnuwin32.sourceforge.net/packages/make.htm.
To invoke a Makefile you must navigate from the command-line(could create a shell script to automate this process), to the directory in which you want to invoke the Makefile of, and simply type 'make' and hit enter. If you have Make installed correctly, then this should run just fine provided you haven't messed up the Makefile. Makefiles tend to be named 'Makefile', but if you have multiple Makefiles then you can invoke a specific one by 'make -f MAKEFILE_NAME_HERE'. Quite obviously you replace the 'MAKEFILE_NAME_HERE' with the name of the Makefile you wish to invoke. I'd recommend if you have multiple platforms to compile for that you have multiple Makefiles, one for each OS/platform, e.g. a 'WIN' Makefile, a 'DC' one etc.
In future tutorials I shall cover compiling from the command-line for C/C++ using GCC/G++, and how to link from the command-line in your Makefile etc. Anyway for now, I hope this helped.
-OmenFelix